The final exam will be held from 8am-11am (sharp) on Monday May 18th in
306 Soda Hall. Note that the exam will be open-book/notes, and that
you should bring a calculator.
Elad will hold a final review session on Friday May 15th from
3:30-4:30pm in 550 Cory.
For this week only, Elad's office hours on Thurs. will be held from
The project presentations will be held in the BWRC classroom on Thurs. May
14th starting at 9am (sharp). Attendance at the presentation session
Project #3 handout has been updated to
include the specification on maximum capacitor area.
Thurs. Apr. 30th lecture will be taped ahead on Wed. Apr. 29th from 10:30am
to 12:00pm in 203 McLaughlin.
For this week only, Elad's office hours on Thurs. have been moved to Wed.
Project #3 has been posted and is
due Thurs. 5/14, in the drop box.
Project #2 has been posted and is
due Fri. 4/24, in the drop box.
Clarification: For calculating integrated
noise in SPICE, the limits of integration should be 1kHz to 100GHz.
(4-15) For this week only, Elad's
office hours on Thurs. have been moved to 2:30-3:30pm. Therefore, in
order to give everyone enough time to complete the project, the Project #1
due date has been extended to Fri. 4/17 at 5pm.
Project #1 has been posted and is
due Thurs. 4/16, in the drop box.
(4-7) The originally posted link to
the eye_input.txt file (under the Project section
of the website) was pointing to last year's website. The link has been
updated, so please make sure you download the correct version.
Homework #4 has been posted and is
due Thurs. 4/2, in the drop box.
Due to the midterm, for this Thursday only, Elad's office hours will be
held from 9am - 11am
For practice, previous midterm exams have been posted at the links
below. Note that all of the homework solutions so far can be found in
the Homework section of the website.
Elad will hold a midterm review session on Tues. Mar. 10 at 6pm in 550
Note that the midterm exam will be open-book/notes and that you should
bring a calculator to the exam.
The midterm will be held on Thurs. Mar. 12th from 6:30-8pm in 247 Cory.
Homework #3 has been posted and is
due Thurs. 3/5, in the drop box.
(2-17) There was a typo in the
originally posted version of problem 4)d) from homework #2 - the second
sentence should have ended with "all
capacitors except for CLand Cp are
negligible". A corrected version of the homework has been posted.
You can also assume that there is a finite
resistance RL at the output node in order to make the noise
(2-15) Homework #2: Since ISSCC and
the President's Day holiday have limited the number of office hours since
homework #2 was posted, the due date has been extended to Monday, 2/23 at
Homework #2 has been posted and is
due Thurs. 2/19, in the drop box.
(2-5) There was a typo on slide #9
of Lecture #5 - the equation at the bottom should have been "gdiode = Id/(kT/q)".
A corrected version of the lecture has been posted.
(2-3) If you are getting "weird"
results for your ro and Av simulations in problem 3)d), make sure you look
at the actual DC voltages that the simulator converges to. Note that
if SPICE initially converges to a bogus solution, it will use that solution
as a starting point for all future iterations. In other other words,
it may get stuck around that bogus solution (even if the real circuit should
never behave this way).
Rikky Muller <rikky@eecs> will serve as
our reader and unofficial TA for the course. Rikky will hold a
discussion session/office hours on Tuesdays from 2-3pm in 550 Cory.
Homework #1 has been posted and is
due Thurs. 2/5, in the drop box.
(1-19) Instructions for setting up
an instructional account and running the required tools have been posted in the Software
section of the site.
(1-15) Please note that the class
room has been changed to 203 McLaughlin.
Description: Analysis and optimized design of integrated analog
systems and building blocks. Specific topics include operational and
wide-band amplifiers, gain-bandwidth and power considerations, analysis of
noise in integrated circuits, low noise design, feedback, precision passive
elements, analog switches, comparators, CMOS voltage references,
non-idealities such as matching and supply/IO/substrate coupling. The
course will include a significant design project applying the techniques
taught in class to implement the analog front-end of a high-speed serial